1. Field of the Invention
The present invention relates to a thin-film transistor array substrate used in liquid crystal displays and to a liquid crystal display device which has the thin-film transistor array substrate and in which the operation of pixels is controlled using a thin-film transistor.
2. Description of the Related Art
Conventionally known are active matrix liquid crystal display devices in which thin-film transistors (TFT) are used as switching devices. In recent years, there is an increasing need for higher definition in liquid crystal display devices in conjunction with the increased amount of displayed information, and there is also an increasing need for miniaturization in order to allow such devices to be used in portable terminal equipment. For this reason, advancements are being made to increase the density of pixels by increasing the pattern definition in liquid crystal display devices. There is also a need for greater brightness in the display screen, and efforts have been made to raise the light utilization ratio and improve the aperture ratio of the pixels by increasing pattern definition in order to meet this need.
An active matrix liquid crystal display device carries out display operations by accumulating a prescribed charge in a pixel capacitance composed of a liquid crystal layer and transparent electrodes that are formed on both sides of the liquid crystal layer. However, active matrix liquid crystal display devices have a drawback in that the charge accumulated in the pixel capacitance fluctuates due a leak current produced in the pixel TFT that controls the pixel operation, and the display quality is degraded. One type of leak current produced in the pixel TFT is an optical leak current that is produced by excitation with light incident on the pixel TFT and generation of carriers. In order to reduce the optical leak current, a known method forms a light-blocking film so that light does not reach the channel area of the pixel TFT.
Also known is a method that reduces the effect of leak current by providing an auxiliary capacitance in parallel with the pixel capacitance, and liquid crystal display devices with a structure provided with an auxiliary capacitance below the pixel TFT are disclosed in prior art (refer to Japanese Laid-Open Patent Applications 2003-66487, 2001-228492, and 2004-271903, for example). FIG. 1 is a cross-sectional diagram showing the TFT array substrate of the liquid crystal display described in Japanese Laid-Open Patent Application 2003-66487. FIG. 1 shows the structure of a single pixel. The TFT array substrate 100 in the liquid crystal display device is configured so that a lower electrode 102 is separated in pixel units and formed as islands on the transparent substrate 101, as shown in FIG. 1, and an upper electrode 105 is formed on the top surface of the lower electrode 102 via a dielectric film 104. The auxiliary capacitance 124 is composed of an upper electrode 105, a dielectric film 104, and a lower electrode 102, and an interlayer insulating film 106 is formed so as to cover the auxiliary capacitance 124. The upper electrode 105 is connected to the upper electrodes of the adjacent pixels.
A semiconductor film 107 is formed in the area above the lower electrode 102 on the interlayer insulating film 106, and the lower electrode 102 and semiconductor film 107 are connected to each other by way of a connecting electrode 126 formed in the contact hole 121 provided in the interlayer insulating film 106. A gate line 109 is formed in the semiconductor film 107 in the area above the upper electrode 105 by way of a gate insulating film 108, and the semiconductor film 107, gate insulating film 108, and gate line 109 constitute a pixel TFT 131. In this manner, the auxiliary capacitance 124 is disposed below the pixel TFT 131 in the TFT array substrate 100.
An interlayer insulating film 110 is formed so as to cover the pixel TFT 131, and a data line 111 is formed on the interlayer insulating film 110. An interlayer insulating film 112 is furthermore formed so as to cover the interlayer insulating film 110 and data line 111, and a pixel electrode 113 is formed on the interlayer insulating film 112. The data line 111 is connected to the semiconductor film 107 of the pixel TFT 131 via a contact hole 122 provided in the interlayer insulating film 110. The pixel electrode 113 is connected to the semiconductor film 107 via a contact hole 123 formed in a continuous fashion in the interlayer insulating films 110 and 112.
FIG. 2 is a cross-sectional diagram showing the TFT array substrate of the liquid crystal display device described in Japanese Laid-open Patent Application No. 2001-228492. The structure of a single pixel is shown in FIG. 2. The same reference numerals are assigned to the same components as the constituent elements of the TFT array substrate shown in FIG. 1, and a detailed description thereof is omitted. The TFT array substrate 130 in the liquid crystal display device described in Japanese Laid-Open Patent Application No. 2003-66487 (pp. 4-5, FIG. 1) is configured so that a lower electrode 102 is formed on the transparent substrate 101, as shown in FIG. 2, and the upper electrode 135 is separated in pixel units and formed as islands on the lower electrode 102 via a dielectric film 134. The upper electrode 135 and a semiconductor film 107 are connected to each other by way of a contact hole 141. A connection is established between an auxiliary capacitance 144 composed of the lower electrode 102, dielectric film 134, and upper electrode 135, and a pixel TFT 131 composed of the semiconductor film 107, gate insulating film 108, and gate line 109. The configuration other than that described above in the TFT array substrate 130 is the same as the TFT array substrate 100 shown in FIG. 1.
The conventional TFT array substrates shown in FIGS. 1 and 2 are configured so that only the upper electrode, or both the upper and lower electrodes are formed from light-blocking material, thereby allowing the amount of light that enters from the transparent substrate side and irradiates the channel area (not shown) of the pixel TFT to be reduced, and thereby allowing the leak current in the pixel TFT to be reduced. The area that is not transparent to light can be reduced and the aperture ratio can be inhibited in its ability to decrease by disposing an auxiliary capacitance below the TFT array substrate.
Also proposed in the prior art is a TFT array substrate whose light-blocking characteristics are improved by disposing an auxiliary capacitance below the pixel TFT and disposing a light-blocking layer so as to cover the channel area of the pixel TFT (Japanese Laid-Open Patent Application No. 2004-151546, for example).
However, the above-described prior art has drawbacks that are described below. First, there is a drawback in the liquid crystal display devices described in the above-noted publications in that light entering from the transparent substrate side of the TFT array substrate cannot be sufficiently blocked and the contrast of the display screen is inadequate. In the case of the liquid crystal display device described in Japanese Laid-Open Patent Application No. 2003-66487, for example, the lower electrode 102 must be formed as islands in pixel units in order to allow the auxiliary capacitance 124 to function, as shown in FIG. 1, and even if the lower electrode 102 is formed from light-blocking material, light that enters from the reverse side of the TFT array substrate 100, that is, the transparent substrate 101 side, passes through the area between the separately formed lower electrodes 102 and irradiates the channel area of the pixel TFT 131.
In the case of the liquid crystal display device described in Japanese Laid-Open Patent Application No. 2001-228492, for example, the upper electrode 135 must be formed as islands in a pixel units in order allow the auxiliary capacitance 144 to function, as shown in FIG. 2. For this reason, even if the upper electrode 135 is formed from a light-absorbing semiconductor film and the lower electrode 102 is formed from a light blocking metal film, sufficient light-absorbing effect cannot be obtained in the area between the separately formed upper electrodes 135, and light that enters from the reverse side of the TFT array substrate 130, that is, the transparent substrate 101 side, cannot be adequately prevented from irradiating the channel area of the pixel TFT 131.
The light that enters from the front side of the TFT array substrate is ordinarily blocked by a blocking film (black matrix) formed on the TFT array substrate or on the opposing substrate that is disposed facing the TFT array substrate. As described above, however, higher pattern definition is being used in recent years in order to increase pixel density and to make the display screen brighter, but this approach results in a thin and positionally displaced pattern, and it is becoming difficult to completely block incident light at certain incident angles. This problem similarly applies to the liquid crystal display device described in Japanese Laid-Open Patent Application No. 2004-151546 (pp. 5 to 8, FIG. 1). Furthermore, the light that enters from the reverse side of the TFT array substrate is reflected by the black matrix, and there are cases in which the reflected light is directed from the front side of the TFT array substrate 100 to the pixel TFT.